KEYWORDS

UNIX: 37+ years. Ph.D.   MIPS and ARM,   Linux and Android,   Scientific Programming, Statistics, S-PLUS, R, OOP, C, Objective-C, Java, JavaScript, FORTRAN, Assembler. DFT, Image Processing, Digital Filters. GUI. 2D+ Graphics. Swing. X Window. R&D. Servers. Workstations. PCs. Networks, Telecommunications. Teleradiology. TCP/IP, Client/Server. IPC. Kernel. File Systems. Multimedia. CD-R. HTML, XML, WWW, Usenet. Multi-processors,Multi-core. High-Availability. Linux, Solaris, HP-UX, MCSE NT4.0, NEXTSTEP, RTU, POSIX. Performance, Loadable Kernel Modules, CPU Performance Counters.

CURRENT EMPLOYMENT

December 2021 - ...

  Senior Engineer, Benchmarking ... at SiFive

RECENT EMPLOYMENT

November 2017 - November 2019
  Leading Competitive Analysis Engineer at MIPS@Tallwood, then as
  Senior Staff Competitive Analysis Engineer at MIPS@Wave
    Continued work as at Imagination, see below.
February 7, 2013 - November 2017
  Leading Competitive Analysis Engineer at Imagination, Inc.

• I have developed, maintained and intensely used my own "lab", consisting of many MIPS and ARM based systems, with multiple versions of RootFileSystems (for both Linux and Android devices), Linux and Android kernels and I/O devices.
• Systematically compared performance of MIPS-based systems (24K, 34K, 74K, 1004K, 1074K, interAptiv, proAptiv, Apache (P5600), Knight (P6600), Samurai (I6400), Daimyo (I6500), Shaolin (I7200) - mostly FPGA emulated) and ARM-based systems (A7/ONDA, A9/Tegra3, CARMA/CUDA, A15/Arndale, A53, A57, A72).
• Regularly used EEMBC benchmarks (CoreMark, CoreMark-PRO, EEMBC1.1, MultiBench, DENBench, Networking2.0, FPmark, BrowserBench), Dhrystone, Linpack, Whetstone, JavaScript benchmarks (with jsc/WebKit and v8/Google shells on SunSpider and V8),
  Tamarin, X264, iPerf, AIM9, Caffeine, GrinderBench, SPEC2000, SPEC2006, SPEC2017, Stream, OpenSSL (and others).
• Developed own tests to illustrate bottlenecks, scheduler problems, etc, or to illustrate advantages of multi-core, HW multi-threaded processors.
  
• Experimented with different versions of compiler toolchains, from the GCC, CodeSourcery/Mentor and CodeScape families.
• Tested impact of various compilation options on performance.
  
• Maintained own HTML-based collection of test results (indexed with Swish-e), used for performance trends analysis (color coded).
• Developed tools to use the hardware performance counters (the "pecostat" with Linux Loadable Kernel Module), while applying a method to multiplex MIPS limited in number performance counter registers.
  "Pecostat" works on 24K, 34K, 74K, 1004K, 1074K, interAptiv, proAptiv, P5600, P6600, I6400, I6500, I7200 processors, capable of handling multi-core, multi-threaded units.

PREVIOUS EMPLOYMENT

Performance Scientist: "Applications" group at MIPS Technologies, Sunnyvale, California.
Staff Engineer: Performance and Architecture Engineering group at Sun Microsystems, Menlo Park, California.
Initially worked on strategies to make the applications running on Sun's systems highly available. Worked on tools measuring OS availability.
Later worked on methods to collect and process system measurements needed to improve processor and systems design.

• Developed advanced Workload Characterization tools, with easy performance data collection (various SPARC and x86 32/64bits CPUs, Solaris and Linux), graphical and statistical visualization, central database for clustering analysis.
• Developed specialized Loadable Kernel Modules for Linux systems, to collect the performance counters values (2.4 and 2.6 kernels, 32/64bits, SMP, Intel/AMD).

Engineering Scientist: Americas Integration Center of Hewlett-Packard, Roseville, California.
Developed tools for automated integration.
Integrated multi-server telecommunication clusters and Web servers.

EXPERIENCE

• Senior Engineer, Benchmarking: 12/2021-... SiFive
• Senior Staff Competitive Analysis Engineer: 06/2018-11/2019, MIPS@"Wave Computing", Applications Group, Campbell, California, as continuation of work as
• Leading Competitive Analysis Engineer: 11/2017-06/2018, MIPS@Tallwood, Competitive Performance & Applications Group, Santa Clara, California.
  Worked on performance measurement and analysis, including comparison with ARM and ARC similar processors, to assist with characterization of MIPS systems performance for MIPS Marketing and HW&SW Engineering Groups (new products quality assistance).
  Continued with analysis of MIPS cores performance by running various benchmarks, building performance measurement tools, running tests under "Linux", and "BareMetal", cross-analysing huge sets of results, "discovering" changes in cores, toolchains and OS characteristics, helped to answer various questions related to performance.
• Leading Competitive Analysis Engineer: 2/2013-11/2017, Imagination Technologies, Applications group, Sunnyvale, California.
  Worked on performance measurement and analysis, to assist with characterization of MIPS systems performance.
• Performance Scientist: 1/2007-2/2013, MIPS Technologies, Performance and Analysis Engineering (PAE), Sunnyvale, California.
  Worked on Performance Measurement and Analysis System, collected a variety of benchmark results on both Linux and BareMetal systems.
• Staff Engineer: 3/99-12/2006, Sun Microsystems, Performance and Availability Engineering (PAE), Menlo Park, California.
  Worked on SW+HW strategies to make Sun's systems Highly-Available.
  Worked also on methods to collect and process system measurements needed to improve processor and systems design.
• Engineering Scientist: 11/95-3/99, Hewlett-Packard, Americas Integration Center, Roseville, California.
  Developed tools for automated integration of complex cluster systems. Specialized in the integration of telecommunication multi-server systems. Developed Web-based self-maintaining Knowledge Database. Developed Web-based, JavaScript driven, interactive configuration tool (INTEG). Developed CD-ROM based automatic installation technology (INTEG CDs).
• Senior Software Engineer: 3/90-9/95, Resonex, Inc. and Resonex Holdings Corporation, Fremont, California.
  Co-developed software system of 700,000+ lines of C-code, performing medical images acquisition and processing (filtering, compressing, archiving, displaying). Kernel, OS and applications level programming. Performance, robustness, diagnostic enhancement tools design and implementation. Application of a dynamic object-oriented software architecture. Coprocessors code design and optimization. TCP/IP and telecommunication programming. R&D in the area of teleradiology and super-PC systems to replace workstations (NEXTSTEP, Linux, POSIX).
• Software Group Manager: 6/89-3/90, Resonex, Inc., Sunnyvale, California.
  Coordinated efforts to select a new hardware (workstation and coprocessors). Prepared the software team for elaborate system porting while maintaining the rigid manufacturing timing.
• HP-UX Software Engineer: 7/85-6/89, Hewlett-Packard, Systems Engineering Organization, Vienna, Austria.
  Supported HP customers with HP-UX programming and training on the HP9000/3xx/5xx/8xx HW. Developed training seminars on programming and utilities under UNIX. Had won for HP the mega-benchmark on Oracle database application.
• Scientific Software Specialist: 7/81-7/85, International Institute for Applied Systems Analysis (IIASA), Laxenburg, Austria.
  Computing assistance to IIASA scientists to formulate and solve linear and nonlinear economic models. Research in interactive computerized expert systems. Maintenance of the scientific SW tools, under BSD UNIX/VAX system.
• Assistant Professor: 9/74-6/81, Institute of Automatic Control, Warsaw University of Technology, Poland.
  Lectures and seminars on numerical methods of optimization, foundation of automatic control, modeling on analog and digital computers, stochastic identification.

EDUCATION

• Ph.D. Degree, Faculty of Electronic Engineering, Warsaw University of Technology, Poland, 1974.
• Doctoral Studies 1971-1974, at the Institute of Automatic Control, Warsaw, Poland.
  These included work on optimization theory and its numerical applications, model building and sensitivity analysis and also courses at the Faculty of Mathematics, University of Warsaw, Poland.
• M.Sc. Degree, Faculty of Electronic Engineering, Warsaw University of Technology, Poland.
  Master's Thesis title: Design of Dynamic Properties of Industrial Control Systems; accepted in 1971 with distinction.
• Languages: English, German, Polish (native), Russian.
• List of Publications: 19 positions including a book on numerical methods (24 editions).

REWARDS

• Laureate of International Mathematical Olympiad (representing Poland in Berlin and Sofia).
• Distinction of the Master's Thesis work which introduced dynamic analysis to industrial control systems.
• A few software patents, referenced as
  US 20040078695, US 7124328, US 20030236766, US 20030237035, US 7159146, US 7958342

Last update: February 2022